1. Field of the Invention
The present invention relates to a data output buffer and more particularly to a new data output buffer having a selective bootstrap circuit in accordance with the supply voltage level.
2. Description of the Prior Art
Recently, along with the development of miniaturizing techniques in the semiconductor field, memory devices, VLSI circuitry and so forth, become large scale and ultra-integrated, lowering the supply voltage. As the supply voltage becomes low, the noise margin narrows accordingly, requiring a counter-approach to noise in accordance with the variation in supply voltage.
Concerning MOS techniques, the loss of static power is a serious question. To counteract this problem, the output stage of a data output buffer is constructed as a push-pull type, in which the pull-up device is supplied with a data signal DB and the pull-down device supplied with an inverted data signal DB.
Referring to FIG. 1, a conventional data output buffer provides a way for supplying a signal DB at a supply voltage level Vcc to the gate of an NMOS pull-up transistor Ml to drive the output high. However, this design has the disadvantage of providing a weak VOH (the high state of output data) for a low supply voltage Vcc, and is slow in operation. A complementary data output buffer as shown in FIG. 2 provides a way to solve these problems using a PMOS pull-up transistor M3, which improves the VOH and speed when compared with the conventional data output buffer of FIG. 1, but provides poor latch up characteristics during operation. To overcome this deficiency, a bootstrapping data output buffer, as shown in FIGURE 3, for driving an NMOS pull-up transistor M5 high with a boosted voltage level (voltage above Vcc) has been suggested. However, during high supply voltages, the latter suffers from increasing noise.